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<<  Introduction   Hardware I - The NES Interface   Hardware II - Adapter Design   Firmware   Assembly   FAQ   Orders   Conclusion   >>

 

The first thing I did was order some old controllers off of EBay and tear them apart. I was a little surprised at the simplicity of the controllers, 5 wires and one IC. Upon further examination, I noticed that the IC was just a CD4021 - 8 Bit parallel/serial in, serial out shift register.

 

I then created a schematic of the actual NES controllers. The schematic shows how truly simple the controllers really are.

The NES system simply sends a signal to the controllers to “Sample the data” accompanied with a clock signal to read back the button states serially. From the datasheet and the schematic, you can see that all of the buttons are active low. Furthermore, the order of the data is, from the MSB: A, B, Start, Select, Up, Down, Left, Right. The pins for the NES controller are now apparent, Data, Clock, Latch, Vdd, and Vss. The waveforms from the NES system to the NES controller should look something like this:

The actual NES system scans the controllers 60 times per second (every 16.6ms). The data is then buffered and held in a register that the ROMs (aka: games) can read. The rate at which this register is scanned is controlled by the ROM (it’s usually scanned periodically from an interrupt).